Huawei patent reveals 3nm-class process technology plans — China continues to move forward despite US sanctions

When Huawei and Semiconductor Manufacturing International Co. (SMIC) patented self-aligned quadruple patterning (SAQP) lithography methods to produce advanced microchips earlier this year, most assumed the companies were working on building chips using their 5nm-class fabrication process. Apparently, that’s not the limit of their plans, as Huawei is now looking forward to using quadruple patterning for 3nm-class manufacturing technology as well.

SiCarrier, a state-backed chip manufacturing equipment developer that’s working with Huawei, also patented a multi-patterning technique, confirming SMIC’s plans to use this technology for future nodes. Experts like Dan Hutcheson from TechInsights suggest that while SAQP may allow China to manufacture 5nm-class chips, EUV machines will be essential for long-term competitiveness beyond these nodes. Industry experts never envisioned the use of quadruple patterning for 3nm-class nodes.

7nm-class process technology features 36nm–38nm metal pitches, while 5nm-class nodes shrink the metal pitches to 30nm–32nm. At 3nm, metal pitches will get to approximately 21nm–24nm. That could achieve critical dimensions of approximately 12nm for high-volume manufacturing, something that even Low-NA EUV tools cannot achieve without using of double patterning. Yet it looks like Huawei and SMIC plan to get there with SAQP using DUV tools.

SAQP is crucial for Huawei and SMIC as they lack access to leading-edge lithography tools like ASML’s Twinscan NXT:2100i and Twinscan NXE:3400C/3600D/3800E. That’s due to export rules imposed by the Nerherlands, with the U.S. being the primary instigator of the restrictions. SAQP involves repeatedly etching lines on silicon wafers to increase transistor density, reduce power consumption, and enhance performance. This approach mirrors Intel’s previous attempts to avoid relying on extreme ultraviolet (EUV) lithography machines in 2019–2021 with its 10nm-class (later renamed “Intel 7”) node.

Despite the potential benefits, SAQP’s use presents difficult challenges. Intel’s first-generation 10nm-class process technology failed at least in part due to this method. Yields were rumored to be so bad that the only 10nm Canon Lake CPU only had two CPU cores and the integrated graphics was disabled. However, for SMIC, SAQP is necessary to progress in semiconductor technology, enabling the production of more sophisticated chips — including next-generation HiSilicon Kirin processors for consumer devices and Ascend processors for AI servers.

Although the cost per 5nm or 3nm chip using SAQP will almost certainly be higher, making it less feasible (if at all) for commercial devices, the method remains vital for China’s advancements in semiconductor technology. These advancements are essential not only for consumer electronics but also for applications like supercomputers and potentially for developing military capability.