Contest Seeks Best AI-Generated Chip Designs

Using AI bots to write business letters or generate detailed 4-second videos is so last week. The next frontier is using AI to help you design custom silicon for your projects. That’s why Efabless (opens in new tab), a company which makes custom chips to order, is hosting a contest to encourage makers to design their own silicon with the help of AI. 

Winners of Efabless’s AI-Generated Open Silicon Design Challenge (opens in new tab) will have their chips fabricated for free, a process that normally costs just under $10,000 for the company’s customers. The contest is open now, with entries needed by June 2nd.

How exactly would one use AI to design a chip? Believe it or not ChatGPT and Google Bard are capable of writing Verilog code on command. Verilog an HDL (hardware description language) which can be used in the chip fabrication process as it spells out key details about the digital circuits and registers. 

When I asked Bard to write me some sample Verilog code, I got this. I don’t know enough about Verilog to say whether it’s good code or not.

Verilog code from Bard

(Image credit: Tom’s Hardware)

Efabless hosts a platform for creating and getting sample sets of open-source chips designed and fabricated. The company has several shuttles a year where customers can have their designs shipped to a fab and returned a few months later. The company’s chipIgnite program allows you to use a RISC-V core, an automated design flow and get your choice of 100, 300 or 1,000 engineering samples. 

After fabrication is complete, you get packaged dies and some of your parts will be put on evaluation boards you can use for testing. You can then use the company’s open-source tools to test your design and flash firmware to it. The company charges $9,750 per chipIgnite project. 

If you want to get started trying to make your own chip design, you can sign up for a free account at Efabless and check out the company’s many resources and tutorials. This walk-through video (opens in new tab) seems particularly helpful.

You can also see many of the open-source designs that folks have made with Efabless, on its projects page (opens in new tab). These include a VGA sprite generator, a 10-bit DAC with analog neural network and crypto mining SoC. 

In order to be eligible for the AI-Generated Open Silicon Challenge, entrants must have at least the Verilog for their chip generated by an AI and must include all of the prompts or auto GPT session logs in the submission. You can, however, do your verification outside of the AI environment. The designs must be open source so anyone can reproduce them and must be implemented using the OpenLane chipIgnite flow. 

Entries will be judged by a panel of experts with winners announced on June 9, 2023. It’s not immediately clear from the rules how many winners there will be. All of the rules and instructions for entry are on the contest’s page (opens in new tab).